v 20081231 1
T 1210 -11 9 10 1 0 0 0 1
OVERO
T 1210 15372 5 10 0 0 0 0 1
device=OVERO
T 1210 15472 5 10 0 0 0 0 1
footprint=OVERO
T 1160 15372 8 10 1 1 0 0 1
refdes=?
L 7100 8000 7100 15200 3 0 0 0 -1 -1
L 7100 15200 1900 15200 3 0 0 0 -1 -1
L 1900 15200 1900 8000 3 0 0 0 -1 -1
L 1900 8000 7100 8000 3 0 0 0 -1 -1
L 1900 0 7100 0 3 0 0 0 -1 -1
L 7100 0 7100 7200 3 0 0 0 -1 -1
L 7100 7200 1900 7200 3 0 0 0 -1 -1
L 1900 7200 1900 0 3 0 0 0 -1 -1
P 7400 11600 7100 11600 1 0 0
{
T 7450 11550 5 8 0 1 0 0 1
pintype=io
T 7140 11630 5 8 0 1 0 0 1
pinnumber=ADCIN2
T 7140 11630 5 8 0 1 0 0 1
pinseq=ADCIN2
T 7060 11600 3 8 1 1 0 6 1
pinlabel=ADCIN2
}
P 7400 11400 7100 11400 1 0 0
{
T 7450 11350 5 8 0 1 0 0 1
pintype=io
T 7140 11430 5 8 0 1 0 0 1
pinnumber=ADCIN3
T 7140 11430 5 8 0 1 0 0 1
pinseq=ADCIN3
T 7060 11400 3 8 1 1 0 6 1
pinlabel=ADCIN3
}
P 7400 11200 7100 11200 1 0 0
{
T 7450 11150 5 8 0 1 0 0 1
pintype=io
T 7140 11230 5 8 0 1 0 0 1
pinnumber=ADCIN4
T 7140 11230 5 8 0 1 0 0 1
pinseq=ADCIN4
T 7060 11200 3 8 1 1 0 6 1
pinlabel=ADCIN4
}
P 7400 11000 7100 11000 1 0 0
{
T 7450 10950 5 8 0 1 0 0 1
pintype=io
T 7140 11030 5 8 0 1 0 0 1
pinnumber=ADCIN5
T 7140 11030 5 8 0 1 0 0 1
pinseq=ADCIN5
T 7060 11000 3 8 1 1 0 6 1
pinlabel=ADCIN5
}
P 7400 10800 7100 10800 1 0 0
{
T 7450 10750 5 8 0 1 0 0 1
pintype=io
T 7140 10830 5 8 0 1 0 0 1
pinnumber=ADCIN6
T 7140 10830 5 8 0 1 0 0 1
pinseq=ADCIN6
T 7060 10800 3 8 1 1 0 6 1
pinlabel=ADCIN6
}
P 7400 10600 7100 10600 1 0 0
{
T 7450 10550 5 8 0 1 0 0 1
pintype=io
T 7140 10630 5 8 0 1 0 0 1
pinnumber=ADCIN7
T 7140 10630 5 8 0 1 0 0 1
pinseq=ADCIN7
T 7060 10600 3 8 1 1 0 6 1
pinlabel=ADCIN7
}
P 7400 10400 7100 10400 1 0 0
{
T 7450 10350 5 8 0 1 0 0 1
pintype=io
T 7140 10430 5 8 0 1 0 0 1
pinnumber=AGND
T 7140 10430 5 8 0 1 0 0 1
pinseq=AGND
T 7060 10400 3 8 1 1 0 6 1
pinlabel=AGND
}
P 7400 12200 7100 12200 1 0 0
{
T 7450 12150 5 8 0 1 0 0 1
pintype=io
T 7140 12230 5 8 0 1 0 0 1
pinnumber=AUXLF
T 7140 12230 5 8 0 1 0 0 1
pinseq=AUXLF
T 7060 12200 3 8 1 1 0 6 1
pinlabel=AUXLF
}
P 7400 12400 7100 12400 1 0 0
{
T 7450 12350 5 8 0 1 0 0 1
pintype=io
T 7140 12430 5 8 0 1 0 0 1
pinnumber=AUXRF
T 7140 12430 5 8 0 1 0 0 1
pinseq=AUXRF
T 7060 12400 3 8 1 1 0 6 1
pinlabel=AUXRF
}
P 1600 5200 1900 5200 1 0 0
{
T 1550 5150 5 8 0 1 0 6 1
pintype=io
T 1860 5230 5 8 0 1 0 6 1
pinnumber=EM_A1
T 1860 5230 5 8 0 1 0 6 1
pinseq=EM_A1
T 1940 5200 3 8 1 1 0 0 1
pinlabel=EM_A1
}
P 1600 5000 1900 5000 1 0 0
{
T 1550 4950 5 8 0 1 0 6 1
pintype=io
T 1860 5030 5 8 0 1 0 6 1
pinnumber=EM_A2
T 1860 5030 5 8 0 1 0 6 1
pinseq=EM_A2
T 1940 5000 3 8 1 1 0 0 1
pinlabel=EM_A2
}
P 1600 4800 1900 4800 1 0 0
{
T 1550 4750 5 8 0 1 0 6 1
pintype=io
T 1860 4830 5 8 0 1 0 6 1
pinnumber=EM_A3
T 1860 4830 5 8 0 1 0 6 1
pinseq=EM_A3
T 1940 4800 3 8 1 1 0 0 1
pinlabel=EM_A3
}
P 1600 4600 1900 4600 1 0 0
{
T 1550 4550 5 8 0 1 0 6 1
pintype=io
T 1860 4630 5 8 0 1 0 6 1
pinnumber=EM_A4
T 1860 4630 5 8 0 1 0 6 1
pinseq=EM_A4
T 1940 4600 3 8 1 1 0 0 1
pinlabel=EM_A4
}
P 1600 4400 1900 4400 1 0 0
{
T 1550 4350 5 8 0 1 0 6 1
pintype=io
T 1860 4430 5 8 0 1 0 6 1
pinnumber=EM_A5
T 1860 4430 5 8 0 1 0 6 1
pinseq=EM_A5
T 1940 4400 3 8 1 1 0 0 1
pinlabel=EM_A5
}
P 1600 4200 1900 4200 1 0 0
{
T 1550 4150 5 8 0 1 0 6 1
pintype=io
T 1860 4230 5 8 0 1 0 6 1
pinnumber=EM_A6
T 1860 4230 5 8 0 1 0 6 1
pinseq=EM_A6
T 1940 4200 3 8 1 1 0 0 1
pinlabel=EM_A6
}
P 1600 4000 1900 4000 1 0 0
{
T 1550 3950 5 8 0 1 0 6 1
pintype=io
T 1860 4030 5 8 0 1 0 6 1
pinnumber=EM_A7
T 1860 4030 5 8 0 1 0 6 1
pinseq=EM_A7
T 1940 4000 3 8 1 1 0 0 1
pinlabel=EM_A7
}
P 1600 3800 1900 3800 1 0 0
{
T 1550 3750 5 8 0 1 0 6 1
pintype=io
T 1860 3830 5 8 0 1 0 6 1
pinnumber=EM_A8
T 1860 3830 5 8 0 1 0 6 1
pinseq=EM_A8
T 1940 3800 3 8 1 1 0 0 1
pinlabel=EM_A8
}
P 1600 3600 1900 3600 1 0 0
{
T 1550 3550 5 8 0 1 0 6 1
pintype=io
T 1860 3630 5 8 0 1 0 6 1
pinnumber=EM_A9
T 1860 3630 5 8 0 1 0 6 1
pinseq=EM_A9
T 1940 3600 3 8 1 1 0 0 1
pinlabel=EM_A9
}
P 1600 3400 1900 3400 1 0 0
{
T 1550 3350 5 8 0 1 0 6 1
pintype=io
T 1860 3430 5 8 0 1 0 6 1
pinnumber=EM_A10
T 1860 3430 5 8 0 1 0 6 1
pinseq=EM_A10
T 1940 3400 3 8 1 1 0 0 1
pinlabel=EM_A10
}
P 7400 6000 7100 6000 1 0 0
{
T 7450 5950 5 8 0 1 0 0 1
pintype=io
T 7140 6030 5 8 0 1 0 0 1
pinnumber=EM_CLK
T 7140 6030 5 8 0 1 0 0 1
pinseq=EM_CLK
T 7060 6000 3 8 1 1 0 6 1
pinlabel=EM_CLK
}
P 1600 3200 1900 3200 1 0 0
{
T 1550 3150 5 8 0 1 0 6 1
pintype=io
T 1860 3230 5 8 0 1 0 6 1
pinnumber=EM_D0
T 1860 3230 5 8 0 1 0 6 1
pinseq=EM_D0
T 1940 3200 3 8 1 1 0 0 1
pinlabel=EM_D0
}
P 1600 3000 1900 3000 1 0 0
{
T 1550 2950 5 8 0 1 0 6 1
pintype=io
T 1860 3030 5 8 0 1 0 6 1
pinnumber=EM_D1
T 1860 3030 5 8 0 1 0 6 1
pinseq=EM_D1
T 1940 3000 3 8 1 1 0 0 1
pinlabel=EM_D1
}
P 1600 2800 1900 2800 1 0 0
{
T 1550 2750 5 8 0 1 0 6 1
pintype=io
T 1860 2830 5 8 0 1 0 6 1
pinnumber=EM_D2
T 1860 2830 5 8 0 1 0 6 1
pinseq=EM_D2
T 1940 2800 3 8 1 1 0 0 1
pinlabel=EM_D2
}
P 1600 2600 1900 2600 1 0 0
{
T 1550 2550 5 8 0 1 0 6 1
pintype=io
T 1860 2630 5 8 0 1 0 6 1
pinnumber=EM_D3
T 1860 2630 5 8 0 1 0 6 1
pinseq=EM_D3
T 1940 2600 3 8 1 1 0 0 1
pinlabel=EM_D3
}
P 1600 2400 1900 2400 1 0 0
{
T 1550 2350 5 8 0 1 0 6 1
pintype=io
T 1860 2430 5 8 0 1 0 6 1
pinnumber=EM_D4
T 1860 2430 5 8 0 1 0 6 1
pinseq=EM_D4
T 1940 2400 3 8 1 1 0 0 1
pinlabel=EM_D4
}
P 1600 2200 1900 2200 1 0 0
{
T 1550 2150 5 8 0 1 0 6 1
pintype=io
T 1860 2230 5 8 0 1 0 6 1
pinnumber=EM_D5
T 1860 2230 5 8 0 1 0 6 1
pinseq=EM_D5
T 1940 2200 3 8 1 1 0 0 1
pinlabel=EM_D5
}
P 1600 2000 1900 2000 1 0 0
{
T 1550 1950 5 8 0 1 0 6 1
pintype=io
T 1860 2030 5 8 0 1 0 6 1
pinnumber=EM_D6
T 1860 2030 5 8 0 1 0 6 1
pinseq=EM_D6
T 1940 2000 3 8 1 1 0 0 1
pinlabel=EM_D6
}
P 1600 1800 1900 1800 1 0 0
{
T 1550 1750 5 8 0 1 0 6 1
pintype=io
T 1860 1830 5 8 0 1 0 6 1
pinnumber=EM_D7
T 1860 1830 5 8 0 1 0 6 1
pinseq=EM_D7
T 1940 1800 3 8 1 1 0 0 1
pinlabel=EM_D7
}
P 1600 1600 1900 1600 1 0 0
{
T 1550 1550 5 8 0 1 0 6 1
pintype=io
T 1860 1630 5 8 0 1 0 6 1
pinnumber=EM_D8
T 1860 1630 5 8 0 1 0 6 1
pinseq=EM_D8
T 1940 1600 3 8 1 1 0 0 1
pinlabel=EM_D8
}
P 1600 1400 1900 1400 1 0 0
{
T 1550 1350 5 8 0 1 0 6 1
pintype=io
T 1860 1430 5 8 0 1 0 6 1
pinnumber=EM_D9
T 1860 1430 5 8 0 1 0 6 1
pinseq=EM_D9
T 1940 1400 3 8 1 1 0 0 1
pinlabel=EM_D9
}
P 1600 1200 1900 1200 1 0 0
{
T 1550 1150 5 8 0 1 0 6 1
pintype=io
T 1860 1230 5 8 0 1 0 6 1
pinnumber=EM_D10
T 1860 1230 5 8 0 1 0 6 1
pinseq=EM_D10
T 1940 1200 3 8 1 1 0 0 1
pinlabel=EM_D10
}
P 1600 1000 1900 1000 1 0 0
{
T 1550 950 5 8 0 1 0 6 1
pintype=io
T 1860 1030 5 8 0 1 0 6 1
pinnumber=EM_D11
T 1860 1030 5 8 0 1 0 6 1
pinseq=EM_D11
T 1940 1000 3 8 1 1 0 0 1
pinlabel=EM_D11
}
P 1600 800 1900 800 1 0 0
{
T 1550 750 5 8 0 1 0 6 1
pintype=io
T 1860 830 5 8 0 1 0 6 1
pinnumber=EM_D12
T 1860 830 5 8 0 1 0 6 1
pinseq=EM_D12
T 1940 800 3 8 1 1 0 0 1
pinlabel=EM_D12
}
P 1600 600 1900 600 1 0 0
{
T 1550 550 5 8 0 1 0 6 1
pintype=io
T 1860 630 5 8 0 1 0 6 1
pinnumber=EM_D13
T 1860 630 5 8 0 1 0 6 1
pinseq=EM_D13
T 1940 600 3 8 1 1 0 0 1
pinlabel=EM_D13
}
P 1600 400 1900 400 1 0 0
{
T 1550 350 5 8 0 1 0 6 1
pintype=io
T 1860 430 5 8 0 1 0 6 1
pinnumber=EM_D14
T 1860 430 5 8 0 1 0 6 1
pinseq=EM_D14
T 1940 400 3 8 1 1 0 0 1
pinlabel=EM_D14
}
P 1600 200 1900 200 1 0 0
{
T 1550 150 5 8 0 1 0 6 1
pintype=io
T 1860 230 5 8 0 1 0 6 1
pinnumber=EM_D15
T 1860 230 5 8 0 1 0 6 1
pinseq=EM_D15
T 1940 200 3 8 1 1 0 0 1
pinlabel=EM_D15
}
P 7400 6200 7100 6200 1 0 0
{
T 7450 6150 5 8 0 1 0 0 1
pintype=io
T 7140 6230 5 8 0 1 0 0 1
pinnumber=EM_NADV_ALE
T 7140 6230 5 8 0 1 0 0 1
pinseq=EM_NADV_ALE
T 7060 6200 3 8 1 1 0 6 1
pinlabel=EM_NADV_ALE
}
P 1600 6200 1900 6200 1 0 0
{
T 1550 6150 5 8 0 1 0 6 1
pintype=io
T 1860 6230 5 8 0 1 0 6 1
pinnumber=EM_NBE0
T 1860 6230 5 8 0 1 0 6 1
pinseq=EM_NBE0
T 1940 6200 3 8 1 1 0 0 1
pinlabel=EM_NBE0
}
P 1600 6000 1900 6000 1 0 0
{
T 1550 5950 5 8 0 1 0 6 1
pintype=io
T 1860 6030 5 8 0 1 0 6 1
pinnumber=EM_NBE1
T 1860 6030 5 8 0 1 0 6 1
pinseq=EM_NBE1
T 1940 6000 3 8 1 1 0 0 1
pinlabel=EM_NBE1
}
P 7400 5000 7100 5000 1 0 0
{
T 7450 4950 5 8 0 1 0 0 1
pintype=io
T 7140 5030 5 8 0 1 0 0 1
pinnumber=EM_NCS0
T 7140 5030 5 8 0 1 0 0 1
pinseq=EM_NCS0
T 7060 5000 3 8 1 1 0 6 1
pinlabel=EM_NCS0
}
P 7400 5200 7100 5200 1 0 0
{
T 7450 5150 5 8 0 1 0 0 1
pintype=io
T 7140 5230 5 8 0 1 0 0 1
pinnumber=EM_NCS1
T 7140 5230 5 8 0 1 0 0 1
pinseq=EM_NCS1
T 7060 5200 3 8 1 1 0 6 1
pinlabel=EM_NCS1
}
P 7400 5400 7100 5400 1 0 0
{
T 7450 5350 5 8 0 1 0 0 1
pintype=io
T 7140 5430 5 8 0 1 0 0 1
pinnumber=EM_NCS4
T 7140 5430 5 8 0 1 0 0 1
pinseq=EM_NCS4
T 7060 5400 3 8 1 1 0 6 1
pinlabel=EM_NCS4
}
P 1600 6400 1900 6400 1 0 0
{
T 1550 6350 5 8 0 1 0 6 1
pintype=io
T 1860 6430 5 8 0 1 0 6 1
pinnumber=EM_NCS5_ETH0
T 1860 6430 5 8 0 1 0 6 1
pinseq=EM_NCS5_ETH0
T 1940 6400 3 8 1 1 0 0 1
pinlabel=EM_NCS5_ETH0
}
P 7400 5600 7100 5600 1 0 0
{
T 7450 5550 5 8 0 1 0 0 1
pintype=io
T 7140 5630 5 8 0 1 0 0 1
pinnumber=EM_NCS6
T 7140 5630 5 8 0 1 0 0 1
pinseq=EM_NCS6
T 7060 5600 3 8 1 1 0 6 1
pinlabel=EM_NCS6
}
P 1600 5400 1900 5400 1 0 0
{
T 1550 5350 5 8 0 1 0 6 1
pintype=io
T 1860 5430 5 8 0 1 0 6 1
pinnumber=EM_NOE
T 1860 5430 5 8 0 1 0 6 1
pinseq=EM_NOE
T 1940 5400 3 8 1 1 0 0 1
pinlabel=EM_NOE
}
P 1600 5600 1900 5600 1 0 0
{
T 1550 5550 5 8 0 1 0 6 1
pintype=io
T 1860 5630 5 8 0 1 0 6 1
pinnumber=EM_NWE
T 1860 5630 5 8 0 1 0 6 1
pinseq=EM_NWE
T 1940 5600 3 8 1 1 0 0 1
pinlabel=EM_NWE
}
P 1600 5800 1900 5800 1 0 0
{
T 1550 5750 5 8 0 1 0 6 1
pintype=io
T 1860 5830 5 8 0 1 0 6 1
pinnumber=EM_NWP
T 1860 5830 5 8 0 1 0 6 1
pinseq=EM_NWP
T 1940 5800 3 8 1 1 0 0 1
pinlabel=EM_NWP
}
P 7400 5800 7100 5800 1 0 0
{
T 7450 5750 5 8 0 1 0 0 1
pintype=io
T 7140 5830 5 8 0 1 0 0 1
pinnumber=EM_WAIT0
T 7140 5830 5 8 0 1 0 0 1
pinseq=EM_WAIT0
T 7060 5800 3 8 1 1 0 6 1
pinlabel=EM_WAIT0
}
P 7400 6600 7100 6600 1 0 0
{
T 7450 6550 5 8 0 1 0 0 1
pintype=io
T 7140 6630 5 8 0 1 0 0 1
pinnumber=GND
T 7140 6630 5 8 0 1 0 0 1
pinseq=GND
T 7060 6600 3 8 1 1 0 6 1
pinlabel=GND
}
P 7400 6400 7100 6400 1 0 0
{
T 7450 6350 5 8 0 1 0 0 1
pintype=io
T 7140 6430 5 8 0 1 0 0 1
pinnumber=GND@33
T 7140 6430 5 8 0 1 0 0 1
pinseq=GND@33
T 7060 6400 3 8 1 1 0 6 1
pinlabel=GND@33
}
P 7400 14600 7100 14600 1 0 0
{
T 7450 14550 5 8 0 1 0 0 1
pintype=io
T 7140 14630 5 8 0 1 0 0 1
pinnumber=GND@56
T 7140 14630 5 8 0 1 0 0 1
pinseq=GND@56
T 7060 14600 3 8 1 1 0 6 1
pinlabel=GND@56
}
P 7400 14400 7100 14400 1 0 0
{
T 7450 14350 5 8 0 1 0 0 1
pintype=io
T 7140 14430 5 8 0 1 0 0 1
pinnumber=GND@70
T 7140 14430 5 8 0 1 0 0 1
pinseq=GND@70
T 7060 14400 3 8 1 1 0 6 1
pinlabel=GND@70
}
P 7400 13800 7100 13800 1 0 0
{
T 7450 13750 5 8 0 1 0 0 1
pintype=io
T 7140 13830 5 8 0 1 0 0 1
pinnumber=GPIO0_WAKEUP
T 7140 13830 5 8 0 1 0 0 1
pinseq=GPIO0_WAKEUP
T 7060 13800 3 8 1 1 0 6 1
pinlabel=GPIO0_WAKEUP
}
P 7400 2600 7100 2600 1 0 0
{
T 7450 2550 5 8 0 1 0 0 1
pintype=io
T 7140 2630 5 8 0 1 0 0 1
pinnumber=GPIO12_MMC3_CLK
T 7140 2630 5 8 0 1 0 0 1
pinseq=GPIO12_MMC3_CLK
T 7060 2600 3 8 1 1 0 6 1
pinlabel=GPIO12_MMC3_CLK
}
P 7400 2800 7100 2800 1 0 0
{
T 7450 2750 5 8 0 1 0 0 1
pintype=io
T 7140 2830 5 8 0 1 0 0 1
pinnumber=GPIO13_MMC3_CMD
T 7140 2830 5 8 0 1 0 0 1
pinseq=GPIO13_MMC3_CMD
T 7060 2800 3 8 1 1 0 6 1
pinlabel=GPIO13_MMC3_CMD
}
P 7400 1600 7100 1600 1 0 0
{
T 7450 1550 5 8 0 1 0 0 1
pintype=io
T 7140 1630 5 8 0 1 0 0 1
pinnumber=GPIO14_MMC3_DAT4
T 7140 1630 5 8 0 1 0 0 1
pinseq=GPIO14_MMC3_DAT4
T 7060 1600 3 8 1 1 0 6 1
pinlabel=GPIO14_MMC3_DAT4
}
P 7400 1800 7100 1800 1 0 0
{
T 7450 1750 5 8 0 1 0 0 1
pintype=io
T 7140 1830 5 8 0 1 0 0 1
pinnumber=GPIO17_MMC3_D3
T 7140 1830 5 8 0 1 0 0 1
pinseq=GPIO17_MMC3_D3
T 7060 1800 3 8 1 1 0 6 1
pinlabel=GPIO17_MMC3_D3
}
P 7400 2400 7100 2400 1 0 0
{
T 7450 2350 5 8 0 1 0 0 1
pintype=io
T 7140 2430 5 8 0 1 0 0 1
pinnumber=GPIO18_MMC3_D0
T 7140 2430 5 8 0 1 0 0 1
pinseq=GPIO18_MMC3_D0
T 7060 2400 3 8 1 1 0 6 1
pinlabel=GPIO18_MMC3_D0
}
P 7400 2200 7100 2200 1 0 0
{
T 7450 2150 5 8 0 1 0 0 1
pintype=io
T 7140 2230 5 8 0 1 0 0 1
pinnumber=GPIO19_MMC3_D1
T 7140 2230 5 8 0 1 0 0 1
pinseq=GPIO19_MMC3_D1
T 7060 2200 3 8 1 1 0 6 1
pinlabel=GPIO19_MMC3_D1
}
P 7400 2000 7100 2000 1 0 0
{
T 7450 1950 5 8 0 1 0 0 1
pintype=io
T 7140 2030 5 8 0 1 0 0 1
pinnumber=GPIO20_MMC3_D2
T 7140 2030 5 8 0 1 0 0 1
pinseq=GPIO20_MMC3_D2
T 7060 2000 3 8 1 1 0 6 1
pinlabel=GPIO20_MMC3_D2
}
P 7400 1000 7100 1000 1 0 0
{
T 7450 950 5 8 0 1 0 0 1
pintype=io
T 7140 1030 5 8 0 1 0 0 1
pinnumber=GPIO21_MMC3_DAT7
T 7140 1030 5 8 0 1 0 0 1
pinseq=GPIO21_MMC3_DAT7
T 7060 1000 3 8 1 1 0 6 1
pinlabel=GPIO21_MMC3_DAT7
}
P 7400 1200 7100 1200 1 0 0
{
T 7450 1150 5 8 0 1 0 0 1
pintype=io
T 7140 1230 5 8 0 1 0 0 1
pinnumber=GPIO22_MMC3_DAT6
T 7140 1230 5 8 0 1 0 0 1
pinseq=GPIO22_MMC3_DAT6
T 7060 1200 3 8 1 1 0 6 1
pinlabel=GPIO22_MMC3_DAT6
}
P 7400 1400 7100 1400 1 0 0
{
T 7450 1350 5 8 0 1 0 0 1
pintype=io
T 7140 1430 5 8 0 1 0 0 1
pinnumber=GPIO23_MMC3_DAT5
T 7140 1430 5 8 0 1 0 0 1
pinseq=GPIO23_MMC3_DAT5
T 7060 1400 3 8 1 1 0 6 1
pinlabel=GPIO23_MMC3_DAT5
}
P 1600 6600 1900 6600 1 0 0
{
T 1550 6550 5 8 0 1 0 6 1
pintype=io
T 1860 6630 5 8 0 1 0 6 1
pinnumber=GPIO64_ETH0_NRESET
T 1860 6630 5 8 0 1 0 6 1
pinseq=GPIO64_ETH0_NRESET
T 1940 6600 3 8 1 1 0 0 1
pinlabel=GPIO64_ETH0_NRESET
}
P 1600 7000 1900 7000 1 0 0
{
T 1550 6950 5 8 0 1 0 6 1
pintype=io
T 1860 7030 5 8 0 1 0 6 1
pinnumber=GPIO65_ETH1_IRQ1
T 1860 7030 5 8 0 1 0 6 1
pinseq=GPIO65_ETH1_IRQ1
T 1940 7000 3 8 1 1 0 0 1
pinlabel=GPIO65_ETH1_IRQ1
}
P 1600 9600 1900 9600 1 0 0
{
T 1550 9550 5 8 0 1 0 6 1
pintype=io
T 1860 9630 5 8 0 1 0 6 1
pinnumber=GPIO66_L_PCLK
T 1860 9630 5 8 0 1 0 6 1
pinseq=GPIO66_L_PCLK
T 1940 9600 3 8 1 1 0 0 1
pinlabel=GPIO66_L_PCLK
}
P 1600 9800 1900 9800 1 0 0
{
T 1550 9750 5 8 0 1 0 6 1
pintype=io
T 1860 9830 5 8 0 1 0 6 1
pinnumber=GPIO67_L_LCLK
T 1860 9830 5 8 0 1 0 6 1
pinseq=GPIO67_L_LCLK
T 1940 9800 3 8 1 1 0 0 1
pinlabel=GPIO67_L_LCLK
}
P 1600 10000 1900 10000 1 0 0
{
T 1550 9950 5 8 0 1 0 6 1
pintype=io
T 1860 10030 5 8 0 1 0 6 1
pinnumber=GPIO68_L_FCLK
T 1860 10030 5 8 0 1 0 6 1
pinseq=GPIO68_L_FCLK
T 1940 10000 3 8 1 1 0 0 1
pinlabel=GPIO68_L_FCLK
}
P 1600 10200 1900 10200 1 0 0
{
T 1550 10150 5 8 0 1 0 6 1
pintype=io
T 1860 10230 5 8 0 1 0 6 1
pinnumber=GPIO69_L_BIAS
T 1860 10230 5 8 0 1 0 6 1
pinseq=GPIO69_L_BIAS
T 1940 10200 3 8 1 1 0 0 1
pinlabel=GPIO69_L_BIAS
}
P 1600 15000 1900 15000 1 0 0
{
T 1550 14950 5 8 0 1 0 6 1
pintype=io
T 1860 15030 5 8 0 1 0 6 1
pinnumber=70
T 1860 15030 5 8 0 1 0 6 1
pinseq=70
T 1940 15000 3 8 1 1 0 0 1
pinlabel=GPIO70_L_DD00
}
P 1600 14800 1900 14800 1 0 0
{
T 1550 14750 5 8 0 1 0 6 1
pintype=io
T 1860 14830 5 8 0 1 0 6 1
pinnumber=GPIO71_L_DD01
T 1860 14830 5 8 0 1 0 6 1
pinseq=GPIO71_L_DD01
T 1940 14800 3 8 1 1 0 0 1
pinlabel=GPIO71_L_DD01
}
P 1600 14600 1900 14600 1 0 0
{
T 1550 14550 5 8 0 1 0 6 1
pintype=io
T 1860 14630 5 8 0 1 0 6 1
pinnumber=GPIO72_L_DD02
T 1860 14630 5 8 0 1 0 6 1
pinseq=GPIO72_L_DD02
T 1940 14600 3 8 1 1 0 0 1
pinlabel=GPIO72_L_DD02
}
P 1600 14400 1900 14400 1 0 0
{
T 1550 14350 5 8 0 1 0 6 1
pintype=io
T 1860 14430 5 8 0 1 0 6 1
pinnumber=GPIO73_L_DD03
T 1860 14430 5 8 0 1 0 6 1
pinseq=GPIO73_L_DD03
T 1940 14400 3 8 1 1 0 0 1
pinlabel=GPIO73_L_DD03
}
P 1600 14200 1900 14200 1 0 0
{
T 1550 14150 5 8 0 1 0 6 1
pintype=io
T 1860 14230 5 8 0 1 0 6 1
pinnumber=GPIO74_L_DD04
T 1860 14230 5 8 0 1 0 6 1
pinseq=GPIO74_L_DD04
T 1940 14200 3 8 1 1 0 0 1
pinlabel=GPIO74_L_DD04
}
P 1600 14000 1900 14000 1 0 0
{
T 1550 13950 5 8 0 1 0 6 1
pintype=io
T 1860 14030 5 8 0 1 0 6 1
pinnumber=GPIO75_L_DD05
T 1860 14030 5 8 0 1 0 6 1
pinseq=GPIO75_L_DD05
T 1940 14000 3 8 1 1 0 0 1
pinlabel=GPIO75_L_DD05
}
P 1600 13800 1900 13800 1 0 0
{
T 1550 13750 5 8 0 1 0 6 1
pintype=io
T 1860 13830 5 8 0 1 0 6 1
pinnumber=GPIO76_L_DD06
T 1860 13830 5 8 0 1 0 6 1
pinseq=GPIO76_L_DD06
T 1940 13800 3 8 1 1 0 0 1
pinlabel=GPIO76_L_DD06
}
P 1600 13600 1900 13600 1 0 0
{
T 1550 13550 5 8 0 1 0 6 1
pintype=io
T 1860 13630 5 8 0 1 0 6 1
pinnumber=GPIO77_L_DD07
T 1860 13630 5 8 0 1 0 6 1
pinseq=GPIO77_L_DD07
T 1940 13600 3 8 1 1 0 0 1
pinlabel=GPIO77_L_DD07
}
P 1600 13400 1900 13400 1 0 0
{
T 1550 13350 5 8 0 1 0 6 1
pintype=io
T 1860 13430 5 8 0 1 0 6 1
pinnumber=GPIO78_L_DD08
T 1860 13430 5 8 0 1 0 6 1
pinseq=GPIO78_L_DD08
T 1940 13400 3 8 1 1 0 0 1
pinlabel=GPIO78_L_DD08
}
P 1600 13200 1900 13200 1 0 0
{
T 1550 13150 5 8 0 1 0 6 1
pintype=io
T 1860 13230 5 8 0 1 0 6 1
pinnumber=GPIO79_L_DD09
T 1860 13230 5 8 0 1 0 6 1
pinseq=GPIO79_L_DD09
T 1940 13200 3 8 1 1 0 0 1
pinlabel=GPIO79_L_DD09
}
P 1600 13000 1900 13000 1 0 0
{
T 1550 12950 5 8 0 1 0 6 1
pintype=io
T 1860 13030 5 8 0 1 0 6 1
pinnumber=GPIO80_L_DD10
T 1860 13030 5 8 0 1 0 6 1
pinseq=GPIO80_L_DD10
T 1940 13000 3 8 1 1 0 0 1
pinlabel=GPIO80_L_DD10
}
P 1600 12800 1900 12800 1 0 0
{
T 1550 12750 5 8 0 1 0 6 1
pintype=io
T 1860 12830 5 8 0 1 0 6 1
pinnumber=GPIO81_L_DD11
T 1860 12830 5 8 0 1 0 6 1
pinseq=GPIO81_L_DD11
T 1940 12800 3 8 1 1 0 0 1
pinlabel=GPIO81_L_DD11
}
P 1600 12600 1900 12600 1 0 0
{
T 1550 12550 5 8 0 1 0 6 1
pintype=io
T 1860 12630 5 8 0 1 0 6 1
pinnumber=GPIO82_L_DD12
T 1860 12630 5 8 0 1 0 6 1
pinseq=GPIO82_L_DD12
T 1940 12600 3 8 1 1 0 0 1
pinlabel=GPIO82_L_DD12
}
P 1600 12400 1900 12400 1 0 0
{
T 1550 12350 5 8 0 1 0 6 1
pintype=io
T 1860 12430 5 8 0 1 0 6 1
pinnumber=GPIO83_L_DD13
T 1860 12430 5 8 0 1 0 6 1
pinseq=GPIO83_L_DD13
T 1940 12400 3 8 1 1 0 0 1
pinlabel=GPIO83_L_DD13
}
P 1600 12200 1900 12200 1 0 0
{
T 1550 12150 5 8 0 1 0 6 1
pintype=io
T 1860 12230 5 8 0 1 0 6 1
pinnumber=GPIO84_L_DD14
T 1860 12230 5 8 0 1 0 6 1
pinseq=GPIO84_L_DD14
T 1940 12200 3 8 1 1 0 0 1
pinlabel=GPIO84_L_DD14
}
P 1600 12000 1900 12000 1 0 0
{
T 1550 11950 5 8 0 1 0 6 1
pintype=io
T 1860 12030 5 8 0 1 0 6 1
pinnumber=GPIO85_L_DD15
T 1860 12030 5 8 0 1 0 6 1
pinseq=GPIO85_L_DD15
T 1940 12000 3 8 1 1 0 0 1
pinlabel=GPIO85_L_DD15
}
P 1600 11800 1900 11800 1 0 0
{
T 1550 11750 5 8 0 1 0 6 1
pintype=io
T 1860 11830 5 8 0 1 0 6 1
pinnumber=86
T 1860 11830 5 8 0 1 0 6 1
pinseq=86
T 1940 11800 3 8 1 1 0 0 1
pinlabel=GPIO86_L_DD16
}
P 1600 11600 1900 11600 1 0 0
{
T 1550 11550 5 8 0 1 0 6 1
pintype=io
T 1860 11630 5 8 0 1 0 6 1
pinnumber=GPIO87_L_DD17
T 1860 11630 5 8 0 1 0 6 1
pinseq=GPIO87_L_DD17
T 1940 11600 3 8 1 1 0 0 1
pinlabel=GPIO87_L_DD17
}
P 1600 11400 1900 11400 1 0 0
{
T 1550 11350 5 8 0 1 0 6 1
pintype=io
T 1860 11430 5 8 0 1 0 6 1
pinnumber=GPIO88_L_DD18
T 1860 11430 5 8 0 1 0 6 1
pinseq=GPIO88_L_DD18
T 1940 11400 3 8 1 1 0 0 1
pinlabel=GPIO88_L_DD18
}
P 1600 11200 1900 11200 1 0 0
{
T 1550 11150 5 8 0 1 0 6 1
pintype=io
T 1860 11230 5 8 0 1 0 6 1
pinnumber=GPIO89_L_DD19
T 1860 11230 5 8 0 1 0 6 1
pinseq=GPIO89_L_DD19
T 1940 11200 3 8 1 1 0 0 1
pinlabel=GPIO89_L_DD19
}
P 1600 11000 1900 11000 1 0 0
{
T 1550 10950 5 8 0 1 0 6 1
pintype=io
T 1860 11030 5 8 0 1 0 6 1
pinnumber=GPIO90_L_DD20
T 1860 11030 5 8 0 1 0 6 1
pinseq=GPIO90_L_DD20
T 1940 11000 3 8 1 1 0 0 1
pinlabel=GPIO90_L_DD20
}
P 1600 10800 1900 10800 1 0 0
{
T 1550 10750 5 8 0 1 0 6 1
pintype=io
T 1860 10830 5 8 0 1 0 6 1
pinnumber=GPIO91_L_DD21
T 1860 10830 5 8 0 1 0 6 1
pinseq=GPIO91_L_DD21
T 1940 10800 3 8 1 1 0 0 1
pinlabel=GPIO91_L_DD21
}
P 1600 10600 1900 10600 1 0 0
{
T 1550 10550 5 8 0 1 0 6 1
pintype=io
T 1860 10630 5 8 0 1 0 6 1
pinnumber=GPIO92_L_DD22
T 1860 10630 5 8 0 1 0 6 1
pinseq=GPIO92_L_DD22
T 1940 10600 3 8 1 1 0 0 1
pinlabel=GPIO92_L_DD22
}
P 1600 10400 1900 10400 1 0 0
{
T 1550 10350 5 8 0 1 0 6 1
pintype=io
T 1860 10430 5 8 0 1 0 6 1
pinnumber=GPIO93_L_DD23
T 1860 10430 5 8 0 1 0 6 1
pinseq=GPIO93_L_DD23
T 1940 10400 3 8 1 1 0 0 1
pinlabel=GPIO93_L_DD23
}
P 7400 3800 7100 3800 1 0 0
{
T 7450 3750 5 8 0 1 0 0 1
pintype=io
T 7140 3830 5 8 0 1 0 0 1
pinnumber=GPIO114_SPI1_NIRQ
T 7140 3830 5 8 0 1 0 0 1
pinseq=GPIO114_SPI1_NIRQ
T 7060 3800 3 8 1 1 0 6 1
pinlabel=GPIO114_SPI1_NIRQ
}
P 1600 8400 1900 8400 1 0 0
{
T 1550 8350 5 8 0 1 0 6 1
pintype=io
T 1860 8430 5 8 0 1 0 6 1
pinnumber=GPIO127_TS_IRQ
T 1860 8430 5 8 0 1 0 6 1
pinseq=GPIO127_TS_IRQ
T 1940 8400 3 8 1 1 0 0 1
pinlabel=GPIO127_TS_IRQ
}
P 1600 8200 1900 8200 1 0 0
{
T 1550 8150 5 8 0 1 0 6 1
pintype=io
T 1860 8230 5 8 0 1 0 6 1
pinnumber=GPIO128_GPS_PPS
T 1860 8230 5 8 0 1 0 6 1
pinseq=GPIO128_GPS_PPS
T 1940 8200 3 8 1 1 0 0 1
pinlabel=GPIO128_GPS_PPS
}
P 7400 9400 7100 9400 1 0 0
{
T 7450 9350 5 8 0 1 0 0 1
pintype=io
T 7140 9430 5 8 0 1 0 0 1
pinnumber=GPIO144_GPT9_PWM
T 7140 9430 5 8 0 1 0 0 1
pinseq=GPIO144_GPT9_PWM
T 7060 9400 3 8 1 1 0 6 1
pinlabel=GPIO144_GPT9_PWM
}
P 7400 9000 7100 9000 1 0 0
{
T 7450 8950 5 8 0 1 0 0 1
pintype=io
T 7140 9030 5 8 0 1 0 0 1
pinnumber=GPIO145_GPT10_PWM
T 7140 9030 5 8 0 1 0 0 1
pinseq=GPIO145_GPT10_PWM
T 7060 9000 3 8 1 1 0 6 1
pinlabel=GPIO145_GPT10_PWM
}
P 7400 9200 7100 9200 1 0 0
{
T 7450 9150 5 8 0 1 0 0 1
pintype=io
T 7140 9230 5 8 0 1 0 0 1
pinnumber=GPIO146_GPT11_PWM
T 7140 9230 5 8 0 1 0 0 1
pinseq=GPIO146_GPT11_PWM
T 7060 9200 3 8 1 1 0 6 1
pinlabel=GPIO146_GPT11_PWM
}
P 7400 9600 7100 9600 1 0 0
{
T 7450 9550 5 8 0 1 0 0 1
pintype=io
T 7140 9630 5 8 0 1 0 0 1
pinnumber=GPIO147_GPT8_PWM
T 7140 9630 5 8 0 1 0 0 1
pinseq=GPIO147_GPT8_PWM
T 7060 9600 3 8 1 1 0 6 1
pinlabel=GPIO147_GPT8_PWM
}
P 7400 3400 7100 3400 1 0 0
{
T 7450 3350 5 8 0 1 0 0 1
pintype=io
T 7140 3430 5 8 0 1 0 0 1
pinnumber=GPIO148_TXD1
T 7140 3430 5 8 0 1 0 0 1
pinseq=GPIO148_TXD1
T 7060 3400 3 8 1 1 0 6 1
pinlabel=GPIO148_TXD1
}
P 7400 3200 7100 3200 1 0 0
{
T 7450 3150 5 8 0 1 0 0 1
pintype=io
T 7140 3230 5 8 0 1 0 0 1
pinnumber=GPIO149_MMC3_CD
T 7140 3230 5 8 0 1 0 0 1
pinseq=GPIO149_MMC3_CD
T 7060 3200 3 8 1 1 0 6 1
pinlabel=GPIO149_MMC3_CD
}
P 7400 3000 7100 3000 1 0 0
{
T 7450 2950 5 8 0 1 0 0 1
pintype=io
T 7140 3030 5 8 0 1 0 0 1
pinnumber=GPIO150_MMC3_WP
T 7140 3030 5 8 0 1 0 0 1
pinseq=GPIO150_MMC3_WP
T 7060 3000 3 8 1 1 0 6 1
pinlabel=GPIO150_MMC3_WP
}
P 7400 3600 7100 3600 1 0 0
{
T 7450 3550 5 8 0 1 0 0 1
pintype=io
T 7140 3630 5 8 0 1 0 0 1
pinnumber=GPIO151_RXD1
T 7140 3630 5 8 0 1 0 0 1
pinseq=GPIO151_RXD1
T 7060 3600 3 8 1 1 0 6 1
pinlabel=GPIO151_RXD1
}
P 1600 8600 1900 8600 1 0 0
{
T 1550 8550 5 8 0 1 0 6 1
pintype=io
T 1860 8630 5 8 0 1 0 6 1
pinnumber=GPIO163_IR_CTS3
T 1860 8630 5 8 0 1 0 6 1
pinseq=GPIO163_IR_CTS3
T 1940 8600 3 8 1 1 0 0 1
pinlabel=GPIO163_IR_CTS3
}
P 1600 8800 1900 8800 1 0 0
{
T 1550 8750 5 8 0 1 0 6 1
pintype=io
T 1860 8830 5 8 0 1 0 6 1
pinnumber=GPIO165_IR_RXD3
T 1860 8830 5 8 0 1 0 6 1
pinseq=GPIO165_IR_RXD3
T 1940 8800 3 8 1 1 0 0 1
pinlabel=GPIO165_IR_RXD3
}
P 1600 9000 1900 9000 1 0 0
{
T 1550 8950 5 8 0 1 0 6 1
pintype=io
T 1860 9030 5 8 0 1 0 6 1
pinnumber=GPIO166_IR_TXD3
T 1860 9030 5 8 0 1 0 6 1
pinseq=GPIO166_IR_TXD3
T 1940 9000 3 8 1 1 0 0 1
pinlabel=GPIO166_IR_TXD3
}
P 7400 800 7100 800 1 0 0
{
T 7450 750 5 8 0 1 0 0 1
pintype=io
T 7140 830 5 8 0 1 0 0 1
pinnumber=GPIO168_USBH_CPEN
T 7140 830 5 8 0 1 0 0 1
pinseq=GPIO168_USBH_CPEN
T 7060 800 3 8 1 1 0 6 1
pinlabel=GPIO168_USBH_CPEN
}
P 7400 10200 7100 10200 1 0 0
{
T 7450 10150 5 8 0 1 0 0 1
pintype=io
T 7140 10230 5 8 0 1 0 0 1
pinnumber=GPIO170_HDQ_1WIRE
T 7140 10230 5 8 0 1 0 0 1
pinseq=GPIO170_HDQ_1WIRE
T 7060 10200 3 8 1 1 0 6 1
pinlabel=GPIO170_HDQ_1WIRE
}
P 7400 4400 7100 4400 1 0 0
{
T 7450 4350 5 8 0 1 0 0 1
pintype=io
T 7140 4430 5 8 0 1 0 0 1
pinnumber=GPIO171_SPI1_CLK
T 7140 4430 5 8 0 1 0 0 1
pinseq=GPIO171_SPI1_CLK
T 7060 4400 3 8 1 1 0 6 1
pinlabel=GPIO171_SPI1_CLK
}
P 7400 4600 7100 4600 1 0 0
{
T 7450 4550 5 8 0 1 0 0 1
pintype=io
T 7140 4630 5 8 0 1 0 0 1
pinnumber=GPIO172_SPI1_MOSI
T 7140 4630 5 8 0 1 0 0 1
pinseq=GPIO172_SPI1_MOSI
T 7060 4600 3 8 1 1 0 6 1
pinlabel=GPIO172_SPI1_MOSI
}
P 7400 4800 7100 4800 1 0 0
{
T 7450 4750 5 8 0 1 0 0 1
pintype=io
T 7140 4830 5 8 0 1 0 0 1
pinnumber=GPIO173_SPI1_MISO
T 7140 4830 5 8 0 1 0 0 1
pinseq=GPIO173_SPI1_MISO
T 7060 4800 3 8 1 1 0 6 1
pinlabel=GPIO173_SPI1_MISO
}
P 7400 4000 7100 4000 1 0 0
{
T 7450 3950 5 8 0 1 0 0 1
pintype=io
T 7140 4030 5 8 0 1 0 0 1
pinnumber=GPIO174_SPI1_CS0
T 7140 4030 5 8 0 1 0 0 1
pinseq=GPIO174_SPI1_CS0
T 7060 4000 3 8 1 1 0 6 1
pinlabel=GPIO174_SPI1_CS0
}
P 7400 4200 7100 4200 1 0 0
{
T 7450 4150 5 8 0 1 0 0 1
pintype=io
T 7140 4230 5 8 0 1 0 0 1
pinnumber=GPIO175_SPI1_CS1
T 7140 4230 5 8 0 1 0 0 1
pinseq=GPIO175_SPI1_CS1
T 7060 4200 3 8 1 1 0 6 1
pinlabel=GPIO175_SPI1_CS1
}
P 1600 6800 1900 6800 1 0 0
{
T 1550 6750 5 8 0 1 0 6 1
pintype=io
T 1860 6830 5 8 0 1 0 6 1
pinnumber=GPIO176_ETH0_IRQ
T 1860 6830 5 8 0 1 0 6 1
pinseq=GPIO176_ETH0_IRQ
T 1940 6800 3 8 1 1 0 0 1
pinlabel=GPIO176_ETH0_IRQ
}
P 1600 9200 1900 9200 1 0 0
{
T 1550 9150 5 8 0 1 0 6 1
pintype=io
T 1860 9230 5 8 0 1 0 6 1
pinnumber=GPIO184_I2C3_SCL
T 1860 9230 5 8 0 1 0 6 1
pinseq=GPIO184_I2C3_SCL
T 1940 9200 3 8 1 1 0 0 1
pinlabel=GPIO184_I2C3_SCL
}
P 1600 9400 1900 9400 1 0 0
{
T 1550 9350 5 8 0 1 0 6 1
pintype=io
T 1860 9430 5 8 0 1 0 6 1
pinnumber=GPIO185_I2C3_SDA
T 1860 9430 5 8 0 1 0 6 1
pinseq=GPIO185_I2C3_SDA
T 1940 9400 3 8 1 1 0 0 1
pinlabel=GPIO185_I2C3_SDA
}
P 7400 12600 7100 12600 1 0 0
{
T 7450 12550 5 8 0 1 0 0 1
pintype=io
T 7140 12630 5 8 0 1 0 0 1
pinnumber=HSOLF
T 7140 12630 5 8 0 1 0 0 1
pinseq=HSOLF
T 7060 12600 3 8 1 1 0 6 1
pinlabel=HSOLF
}
P 7400 12800 7100 12800 1 0 0
{
T 7450 12750 5 8 0 1 0 0 1
pintype=io
T 7140 12830 5 8 0 1 0 0 1
pinnumber=HSORF
T 7140 12830 5 8 0 1 0 0 1
pinseq=HSORF
T 7060 12800 3 8 1 1 0 6 1
pinlabel=HSORF
}
P 7400 11800 7100 11800 1 0 0
{
T 7450 11750 5 8 0 1 0 0 1
pintype=io
T 7140 11830 5 8 0 1 0 0 1
pinnumber=MIC_MAIN_MF
T 7140 11830 5 8 0 1 0 0 1
pinseq=MIC_MAIN_MF
T 7060 11800 3 8 1 1 0 6 1
pinlabel=MIC_MAIN_MF
}
P 7400 12000 7100 12000 1 0 0
{
T 7450 11950 5 8 0 1 0 0 1
pintype=io
T 7140 12030 5 8 0 1 0 0 1
pinnumber=MIC_SUB_MF
T 7140 12030 5 8 0 1 0 0 1
pinseq=MIC_SUB_MF
T 7060 12000 3 8 1 1 0 6 1
pinlabel=MIC_SUB_MF
}
P 7400 13200 7100 13200 1 0 0
{
T 7450 13150 5 8 0 1 0 0 1
pintype=io
T 7140 13230 5 8 0 1 0 0 1
pinnumber=NC@62
T 7140 13230 5 8 0 1 0 0 1
pinseq=NC@62
T 7060 13200 3 8 1 1 0 6 1
pinlabel=NC@62
}
P 7400 13000 7100 13000 1 0 0
{
T 7450 12950 5 8 0 1 0 0 1
pintype=io
T 7140 13030 5 8 0 1 0 0 1
pinnumber=NC@63
T 7140 13030 5 8 0 1 0 0 1
pinseq=NC@63
T 7060 13000 3 8 1 1 0 6 1
pinlabel=NC@63
}
P 7400 14000 7100 14000 1 0 0
{
T 7450 13950 5 8 0 1 0 0 1
pintype=io
T 7140 14030 5 8 0 1 0 0 1
pinnumber=N_MANUAL_RESET
T 7140 14030 5 8 0 1 0 0 1
pinseq=N_MANUAL_RESET
T 7060 14000 3 8 1 1 0 6 1
pinlabel=N_MANUAL_RESET
}
P 7400 13600 7100 13600 1 0 0
{
T 7450 13550 5 8 0 1 0 0 1
pintype=io
T 7140 13630 5 8 0 1 0 0 1
pinnumber=POWERON
T 7140 13630 5 8 0 1 0 0 1
pinseq=POWERON
T 7060 13600 3 8 1 1 0 6 1
pinlabel=POWERON
}
P 7400 10000 7100 10000 1 0 0
{
T 7450 9950 5 8 0 1 0 0 1
pintype=io
T 7140 10030 5 8 0 1 0 0 1
pinnumber=PWM0
T 7140 10030 5 8 0 1 0 0 1
pinseq=PWM0
T 7060 10000 3 8 1 1 0 6 1
pinlabel=PWM0
}
P 7400 9800 7100 9800 1 0 0
{
T 7450 9750 5 8 0 1 0 0 1
pintype=io
T 7140 9830 5 8 0 1 0 0 1
pinnumber=PWM1
T 7140 9830 5 8 0 1 0 0 1
pinseq=PWM1
T 7060 9800 3 8 1 1 0 6 1
pinlabel=PWM1
}
P 7400 13400 7100 13400 1 0 0
{
T 7450 13350 5 8 0 1 0 0 1
pintype=io
T 7140 13430 5 8 0 1 0 0 1
pinnumber=SYSEN
T 7140 13430 5 8 0 1 0 0 1
pinseq=SYSEN
T 7060 13400 3 8 1 1 0 6 1
pinlabel=SYSEN
}
P 7400 200 7100 200 1 0 0
{
T 7450 150 5 8 0 1 0 0 1
pintype=io
T 7140 230 5 8 0 1 0 0 1
pinnumber=USBH_DM
T 7140 230 5 8 0 1 0 0 1
pinseq=USBH_DM
T 7060 200 3 8 1 1 0 6 1
pinlabel=USBH_DM
}
P 7400 400 7100 400 1 0 0
{
T 7450 350 5 8 0 1 0 0 1
pintype=io
T 7140 430 5 8 0 1 0 0 1
pinnumber=USBH_DP
T 7140 430 5 8 0 1 0 0 1
pinseq=USBH_DP
T 7060 400 3 8 1 1 0 6 1
pinlabel=USBH_DP
}
P 7400 600 7100 600 1 0 0
{
T 7450 550 5 8 0 1 0 0 1
pintype=io
T 7140 630 5 8 0 1 0 0 1
pinnumber=USBH_VBUS
T 7140 630 5 8 0 1 0 0 1
pinseq=USBH_VBUS
T 7060 600 3 8 1 1 0 6 1
pinlabel=USBH_VBUS
}
P 7400 8200 7100 8200 1 0 0
{
T 7450 8150 5 8 0 1 0 0 1
pintype=io
T 7140 8230 5 8 0 1 0 0 1
pinnumber=USBOTG_DM
T 7140 8230 5 8 0 1 0 0 1
pinseq=USBOTG_DM
T 7060 8200 3 8 1 1 0 6 1
pinlabel=USBOTG_DM
}
P 7400 8400 7100 8400 1 0 0
{
T 7450 8350 5 8 0 1 0 0 1
pintype=io
T 7140 8430 5 8 0 1 0 0 1
pinnumber=USBOTG_DP
T 7140 8430 5 8 0 1 0 0 1
pinseq=USBOTG_DP
T 7060 8400 3 8 1 1 0 6 1
pinlabel=USBOTG_DP
}
P 7400 8800 7100 8800 1 0 0
{
T 7450 8750 5 8 0 1 0 0 1
pintype=io
T 7140 8830 5 8 0 1 0 0 1
pinnumber=USBOTG_ID
T 7140 8830 5 8 0 1 0 0 1
pinseq=USBOTG_ID
T 7060 8800 3 8 1 1 0 6 1
pinlabel=USBOTG_ID
}
P 7400 8600 7100 8600 1 0 0
{
T 7450 8550 5 8 0 1 0 0 1
pintype=io
T 7140 8630 5 8 0 1 0 0 1
pinnumber=USBOTG_VBUS
T 7140 8630 5 8 0 1 0 0 1
pinseq=USBOTG_VBUS
T 7060 8600 3 8 1 1 0 6 1
pinlabel=USBOTG_VBUS
}
P 7400 14200 7100 14200 1 0 0
{
T 7450 14150 5 8 0 1 0 0 1
pintype=io
T 7140 14230 5 8 0 1 0 0 1
pinnumber=VBACKUP
T 7140 14230 5 8 0 1 0 0 1
pinseq=VBACKUP
T 7060 14200 3 8 1 1 0 6 1
pinlabel=VBACKUP
}
P 7400 7000 7100 7000 1 0 0
{
T 7450 6950 5 8 0 1 0 0 1
pintype=io
T 7140 7030 5 8 0 1 0 0 1
pinnumber=VSYSTEM@1
T 7140 7030 5 8 0 1 0 0 1
pinseq=VSYSTEM@1
T 7060 7000 3 8 1 1 0 6 1
pinlabel=VSYSTEM@1
}
P 7400 6800 7100 6800 1 0 0
{
T 7450 6750 5 8 0 1 0 0 1
pintype=io
T 7140 6830 5 8 0 1 0 0 1
pinnumber=VSYSTEM@2
T 7140 6830 5 8 0 1 0 0 1
pinseq=VSYSTEM@2
T 7060 6800 3 8 1 1 0 6 1
pinlabel=VSYSTEM@2
}
P 7400 14800 7100 14800 1 0 0
{
T 7450 14750 5 8 0 1 0 0 1
pintype=io
T 7140 14830 5 8 0 1 0 0 1
pinnumber=VSYSTEM@66
T 7140 14830 5 8 0 1 0 0 1
pinseq=VSYSTEM@66
T 7060 14800 3 8 1 1 0 6 1
pinlabel=VSYSTEM@66
}
P 7400 15000 7100 15000 1 0 0
{
T 7450 14950 5 8 0 1 0 0 1
pintype=io
T 7140 15030 5 8 0 1 0 0 1
pinnumber=VSYSTEM@67
T 7140 15030 5 8 0 1 0 0 1
pinseq=VSYSTEM@67
T 7060 15000 3 8 1 1 0 6 1
pinlabel=VSYSTEM@67
}